Cadence® SiP RF Layout
Enables layout designers to implement a SiP RF design that includes RF/analog die, embedded RF discretes, constraint-driven interconnect, and full SiP tapeout manufacturing preparation.
Supported Technologies
HP/UX,
Solaris/Sun OS,
Linux
Software
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Pricing
- Unspecified -
http://www.cadence.com/company/cadence_worldwide/offices.aspx
800.746.6223, 408.954.1234
Resources
Additional Product Information
Enables layout designers to implement a SiP RF design that includes RF/analog die, embedded RF discretes, constraint-driven interconnect, and full SiP tapeout manufacturing preparation.