ApsimSI
ApsimSI can verify reflection and crosstalk noise along traces in layout designs using the most accurate lossy coupled transmission line simulator ApsimSPICE, fast transmission line parameter extractor ApsimRLGC and layout modeler ApsimLIF. ApsimSI is integrated with PCB and MCM CAD systems
English
Supported Technologies
Windows XP/2000/NT ,
HP/UX,
Solaris/Sun OS
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Pricing
- Unspecified -
sales@apsimtech.com
408-436-9070x106
Additional Product Information
Introduction;ApsimSI can verify reflection and crosstalk noise along traces in layout designs using the most accurate lossy coupled transmission line simulator ApsimSPICE, fast transmission line parameter extractor ApsimRLGC and layout modeler ApsimLIF. ApsimSI is integrated with PCB and MCM CAD systems.;Overview;With higher slew rates, increased signal densities and heavier use of mixed analog/digital designs, a new level of design complexity has been achieved for printed circuit board and multichip module designs. Noise margins that once used to hide a multitude of design problems are now reduced to the point where signal integrity tools are necessary. Problems such as propagation delays, reflections caused by impedance mismatches and crosstalk noise extend the design cycle, delay product release and increase product field support. To accurately predict and eliminate these types of problems, engineers need a suite of integrated tools that include the effects of all the physical and electrical design element properties and their mutual interaction. These tools must have automatic extraction and model building from the design layout and a simulator that will provide the dynamic characteristics representing the actual design operation. ApsimSI provides the most advanced suite of integrated tools for engineers requiring signal integrity analysis of high-speed or complex designs. ApsimSI is designed so that each piece fully utilizes the capabilities and accuracy of all the other pieces.;ApsimSI Features ;Reflection noise and delay. ;Crosstalk noise for parallel traces on the same and different layers. ;Accurate, fast and flexible simulation for interconnections (mirostrip, stripline, coplanar lines and vias) with digital and analog circuits. ;Layout verification for real traces after routing, Manhattan or straight distances after placement. ;Through-device such as digital gates and analog discrete components simulation. ;Signal Integrity reports: Geometry report (trace length, parallel trace length on each stack-up layer). Electrical report (impedance mismatch, unit length delay, coupling coefficients, number of vias). Simulation report (delay, overshoot, undershoot, crosstalk). ;Layout CAD Interfaces. ;Integration with ApsimRADIA (Option). ;Analog layout modeler ApsimALM (Option).